Xilinx KCU105 User Manual

KCU105 Board User Guide www.xilinx.com 56
UG917 (v1.4) September 25, 2015
Chapter 1: KCU105 Evaluation Board Features
IMPORTANT: The TCA9548 U28 RESET_B pin 3 is connected to FPGA U1 bank 64 pin AP10 via
level-shifter U44. The PCA9544 does not have a reset pin. FPGA pin AP10 LVCMOS18 net
IIC_MUX_RESET_B_LS must be driven High to enable I2C bus transactions with the devices connected to
U28.
User FPGA applications that communicate with devices on one of the downstream I2C
buses must first set up a path to the desired target bus through the U28 or U80 bus switch
at I2C address 0x74 (0b1110100) or 0x75 (0b1110101), respectively. Tabl e 1-1 9 lists the
address for each device on the I2C bus.
Information on the TCA9548 and PCA9544 is available on the Texas Instruments website
[Ref 33].
For additional information on the Zynq-7000 AP SoC device I2C controller, see Zynq-7000
All Programmable SoC Overview Data Sheet (DS190) [Ref 2] and Zynq-7000 All
Programmable SoC Technical Reference Manual (UG585) [Ref 13].
Table 1-19: I2C Devices
I2C Devices
I2C Switch
Position
I2C Address
Device
Binary Format Hex Format
TCA9548 8-channel bus switch N/A 0b1110100 0x74 U28 TCA9548
Si570 clock 0 0b1011101 0x5D U32 Si570
I2C port expander 1 0b0100001 0x21 U89 TCA6416
SFP module 0 (SFP0) 2 0b1010000 0x50 P5 SFP0
SFP module 1 (SFP1) 3 0b1010000 0x50 P4 SFP1
Si5328 clock 4 0b1101000 0x68 U57 Si5328B
ADV7511 HDMI 5 0b0111001 0x39 U52 ADV7511
FPGA SYSMON 6 0b0110010 0x32 U1 SYSMON
Not used 7 N/A N/A N/A
PCA9544 4-channel bus switch N/A 0b1110101 0x75 U80 PCA9544
PMBUS regulators 0
0b0010000-
0b0011000
0x10-0x18 MAX15301/3 (1)
FMC HPC 1 0bXXXXX00 0x## J22 FMC HPC
FMC LPC 2 0bXXXXX00 0x## J2 FMC LPC
I2C EEPROM 3 0b1010100 0x54 U12 M24C08
Notes:
MAX15301: U29,U30,U31; MAX15303: U3,U4,U6,U7,U8,U9,U10.
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Xilinx KCU105 Specifications

General

Brand	Xilinx
Model	KCU105
Category	Motherboard
Language	English