Xilinx VCU128 User Manual

Table 8: QDR4 Memory 72-bit I/F to FPGA U1 Banks 68, 69, and 70 (cont'd)
FPGA (U1) Pin
Schematic Net
Name
I/O Standard
Component Memory
Pin # Pin Name
F13 QDR4_DQB22 T13 DQB22
C15 QDR4_DQB23 W16 DQB23
F15 QDR4_DQB24 P15 DQB24
A15 QDR4_DQB25 W14 DQB25
F14 QDR4_DQB26 W12 DQB26
C12 QDR4_DQB27 M17 DQB27
A11 QDR4_DQB28 M15 DQB28
B13 QDR4_DQB29 L18 DQB29
B12 QDR4_DQB30 L16 DQB30
A8 QDR4_DQB31 V18 DQB31
A9 QDR4_DQB32 R18 DQB32
B11 QDR4_DQB33 N18 DQB33
B10 QDR4_DQB34 N16 DQB34
A10 QDR4_DQB35 V15 DQB35
QDR4 B-side Control
K14 QDR4_DKB0_P P4 DKB0_P
K13 QDR4_DKB0_N P3 DKB0_N
C10 QDR4_DKB1_P P16 DKB1_P
C9 QDR4_DKB1_N P17 DKB1_N
H10 QDR4_QKB0_P U4 QKB0_P
G10 QDR4_QKB0_N T3 QKB0_N
E13 QDR4_QKB1_P U16 QKB1_P
D12 QDR4_QKB1_N T17 QKB1_N
D9 QDR4_QVLDB0 U3 QVLDB0
D14 QDR4_QVLDB1 U17 QVLDB1
BL2 QDR4_LDB_N H12 LDB_N
BL3 QDR4_RWB_N L10 RWB_N
R606(GND)
1
QDR4_DINVB0 T8 DINVB0
R602(GND)
1
QDR4_DINVB1 T12 DINVB1
Common
BF5 QDR4_A0 F10 A0
BF1 QDR4_A1 G10 A1
BE1 QDR4_A2 N10 A2
BE3 QDR4_A3 G7 A3
BE4 QDR4_A4 G13 A4
BE5 QDR4_A5 J7 A5
BE6 QDR4_A6 J13 A6
BF2 QDR4_A7 L7 A7
Chapter 3: Board Component Descriptions
UG1302 (v1.0) December 21, 2018 www.xilinx.com
VCU128 Board User Guide 32
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Xilinx VCU128 Specifications

General

Brand	Xilinx
Model	VCU128
Category	Motherboard
Language	English