Xilinx Virtex-6 FPGA

Virtex-6 FPGA Connectivity Kit Getting Started www.xilinx.com 29
UG664 (v1.4) July 6, 2011
Getting Started with the Connectivity Targeted Reference Design Demo
15. Load the driver and launch the Performance Monitor application:
a. Navigate to the v6_pcie_10Gdma_ddr3_xaui_axi folder.
b. Double-click v6_trd_lin_quickstart to build the kernel objects, load the device
driver, and launch the Performance Monitor application.
c. A window prompt appears as shown in Figure 21. Click Run in Terminal to
proceed.
X-Ref Target - Figure 21
Figure 21: Load Driver and Launch Performance Monitor Application
UG664_07_061711