Xilinx Virtex-6 FPGA Getting Started Guide

Virtex-6 FPGA Connectivity Kit Getting Started www.xilinx.com 31
UG664 (v1.4) July 6, 2011
Getting Started with the Connectivity Targeted Reference Design Demo
17. Performance Monitor Application: Start the data traffic.
a. To enable the XAUI datapath, click Start Test as shown in Figure 23.
This enables the driver to start generating the data traffic for the DMA channel
connected to the XAUI path.
b. To enable the Raw Data path in loopback mode, click Start Test as shown in
Figure 23.
X-Ref Target - Figure 23
Figure 23: Start Data Traffic from the Performance Monitor
UG664_09_090810

Xilinx Virtex-6 FPGA Specifications

General

Brand	Xilinx
Model	Virtex-6 FPGA
Category	Transceiver
Language	English