Xilinx Virtex-7 FPGA VC7222 IBERT - Page 20

20 www.xilinx.com VC7222 IBERT Getting Started Guide
UG971 (v5.0) June 12, 2014
Chapter 1: VC7222 IBERT Getting Started Guide
3. Vivado Design Suite reports that the XC7VH580T is programmed and displays the
SuperClock-2 VIO core and the IBERT core. To configure the SuperClock-2 module,
click Tools > Run Tcl Script (Figure 1-15). In the Run Script window, navigate
to the setup_scm2_325_00.tcl script in the extracted files and click OK.
X-Ref Target - Figure 1-15
Figure 1-15: Run TCL Script
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