Xilinx Virtex-7 VC7203 User Manual

VC7203 GTX Transceiver Characterization Board www.xilinx.com 47
UG957 (v1.3) October 17, 2014
Appendix A
Default Jumper Settings
Table A-1 lists the jumpers that must be installed on the VC7203 board for proper
operation. These jumpers must be installed except where specifically noted in this user
guide.
Note:
Any jumper not listed in Tabl e A- 1 should be left open for normal operation.
Table A-1: Default Jumper Settings
Reference Designator Name Board Location Jumper Comments
J4 UTIL_3V3 Upper Left AFX (1-2)
J184 UTIL_2V5 Upper Left AFX (1-2)
J24 UTIL_5V0 Upper Left AFX (1-2)
J78 VTT_HR SOURCE Upper Left GND (1-2) Red 20A jumper
J210 PMBUS CTRL Upper Left GND (2-3)
J48 Upper Left POR (1-2)
J49 Upper Left POR (1-2)
J50 Upper Left POR (1-2)
J199 VCCINT Lower Left POR_B (1-2)
J200 VCCBRAM Lower Left POR_B (1-2)
J201 VCCAUX Lower Left POR_B (1-2)
J204 VCCO_HR Lower Left POR_B (1-2)
J202 VCCO_HP Lower Left POR_B (1-2)
J203 VCCAUX_IO Lower Left POR_B (1-2)
J141 VCCADC SELECT Upper Center VCCAUX (1-2)
J142 VREF SEL Upper Center REG (1-2)
J23 SPI LVL TRNS INH Upper Right Installed
J195 VTT_HP SOURCE Center Right GND (1-2) Red 20A jumper
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Xilinx Virtex-7 VC7203 Specifications

General

FPGA Family	Virtex-7
Transceiver	GTH
GTH Transceivers	16
Maximum Data Rate	13.1 Gbps
Transceivers	16
Maximum Transceiver Speed	13.1 Gbps
Maximum User I/O	600
Process Technology	28nm
Block RAM	38 Mb
Power Supply Voltage	0.9V
Operating Temperature Range	Industrial