Xilinx ZC706 User Manual

ZC706 Evaluation Board User Guide www.xilinx.com 21
UG954 (v1.5) September 10, 2015
Feature Descriptions
B11 PL_DDR3_D61 SSTL15 182 DQ61
C14 PL_DDR3_D62 SSTL15 192 DQ62
B14 PL_DDR3_D63 SSTL15 194 DQ63
J3 PL_DDR3_DM0 SSTL15 11 DM0
F2 PL_DDR3_DM1 SSTL15 28 DM1
E1 PL_DDR3_DM2 SSTL15 46 DM2
C2 PL_DDR3_DM3 SSTL15 63 DM3
L12 PL_DDR3_DM4 SSTL15 136 DM4
G14 PL_DDR3_DM5 SSTL15 153 DM5
C16 PL_DDR3_DM6 SSTL15 170 DM6
C11 PL_DDR3_DM7 SSTL15 187 DM7
K2 PL_DDR3_DQS0_N DIFF_SSTL15 10 DQS0_N
K3 PL_DDR3_DQS0_P DIFF_SSTL15 12 DQS0_P
H1 PL_DDR3_DQS1_N DIFF_SSTL15 27 DQS1_N
J1 PL_DDR3_DQS1_P DIFF_SSTL15 29 DQS1_P
D5 PL_DDR3_DQS2_N DIFF_SSTL15 45 DQS2_N
E6 PL_DDR3_DQS2_P DIFF_SSTL15 47 DQS2_P
A4 PL_DDR3_DQS3_N DIFF_SSTL15 62 DQS3_N
A5 PL_DDR3_DQS3_P DIFF_SSTL15 64 DQS3_P
K8 PL_DDR3_DQS4_N DIFF_SSTL15 135 DQS4_N
L8 PL_DDR3_DQS4_P DIFF_SSTL15 137 DQS4_P
F12 PL_DDR3_DQS5_N DIFF_SSTL15 152 DQS5_N
G12 PL_DDR3_DQS5_P DIFF_SSTL15 154 DQS5_P
E17 PL_DDR3_DQS6_N DIFF_SSTL15 169 DQS6_N
F17 PL_DDR3_DQS6_P DIFF_SSTL15 171 DQS6_P
A15 PL_DDR3_DQS7_N DIFF_SSTL15 186 DQS7_N
B15 PL_DDR3_DQS7_P DIFF_SSTL15 188 DQS7_P
G7 PL_DDR3_ODT0 SSTL15 116 ODT0
C9 PL_DDR3_ODT1 SSTL15 120 ODT1
G17 PL_DDR3_RESET_B SSTL15 30 RESET_B
J11 PL_DDR3_S0_B SSTL15 114 S0_B
H8 PL_DDR3_S1_B SSTL15 121 S1_B
M10 PL_DDR3_TEMP_EVE
NT
SSTL15 198 EVENT_B
F7 PL_DDR3_WE_B SSTL15 113 WE_B
Table 1-4: DDR3 SODIMM Socket J1 Connections to the XC7Z045 AP SoC (Cont ’d)
XC7Z045 (U1)
Pin
Net Name I/O Standard
DDR3 SODIMM Memory J1
Pin Number Pin Name
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Xilinx ZC706 Specifications

General

Brand	Xilinx
Model	ZC706
Category	Motherboard
Language	English