Xilinx ZC706 User Manual

ZC706 Evaluation Board User Guide www.xilinx.com 75
UG954 (v1.5) September 10, 2015
Feature Descriptions
The LMZ31520, LMZ31506, and LMZ31710 adjustable voltage regulators have their output
voltage set through an external resistor. The regulator topology on the ZC706 board
permits the TI UCD90120A module to monitor rail voltage and current. Voltage margining at
+5% and -5% is also implemented.
Each voltage regulator’s external V
OUT
setting resistor is calculated and implemented as if
the regulator is stand-alone. The TI UCD90120A module has two ADC inputs allocated per
voltage rail, one input for the remote voltage sense connection, the other for the current
sense resistor op amp output voltage connection. The TI UCD90120A ADC full scale input is
2.5V. The remote voltage feedback is scaled to approximately 2V if it exceeds 2V, that is, the
V
CCO_VADJ
rail for the 2.5V and 3.3V modes, and the FPGA_3V3 rail also at 3.3V are
resistor-attenuated to scale the remotely sensed voltage at a ratio of 0.606 to give
approximately 2V at the ADC input pin for a 3.3V remote sense value. Rails below 2V are not
scaled.
Each rail’s current sense op amp has its gain set to provide approximately 2V maximum at
the TI UCD90120A ADC input pin when the rail current is at its expected maximum current
level, as can be seen in the U48 controller power system figure (Figure 1-33).
The TI UCD90120A module has an assignable group of GPIO pins with PWM capability. Each
controller “channel” has a PWM GPIO pin wired to the associated voltage regulator V
ADJ
pin.
The external V
OUT
setting resistor is also wired to this pin. The PWM GPIO pin is configured
in 3-state mode. This pin is not driven unless a Margin command is executed. The Margin
command is available within the TI Fusion Digital Power™ designer software.
During the margin-High or Low operation, the PWM GPIO pin drives a voltage into the
voltage regulator V
ADJ
pin, which causes a slight voltage change resulting in the regulator
V
OUT
moving to the margin +5% or -5% voltage commanded.
XADC Power System Measurement
The ZC706 board XADC interface includes power system voltage and current measuring
capability. The V
CCINT
and V
CCAUX
rail voltages are measured using the XADC internal
voltage measurement capability. Other rails are measured through an external Analog
Devices ADG707BRU multiplexer U6. Each rail has a separate TI INA333 op amp strapped
across its series current sense resistor Kelvin terminals. This op amp has its gain adjusted to
give approximately 1V at the expected full scale current value for the rail.
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Xilinx ZC706 Specifications

General

Brand	Xilinx
Model	ZC706
Category	Motherboard
Language	English