Xilinx ZC706 User Manual

ZC706 Evaluation Board User Guide www.xilinx.com 83
UG954 (v1.5) September 10, 2015
Feature Descriptions
AA19 respectively, enabling the user to implement their own fan speed control IP in the
AP SoC PL logic.
More information about the power system components used by the ZC706 evaluation
board are available from the Texas Instruments digital power website [Ref 32].
XADC Analog-to-Digital Converter
[Figure 1-2, callout 33]
The XC7Z045 AP SoC provides an Analog Front End XADC block. The XADC block includes
a dual 12-bit, 1 MSPS Analog-to-Digital Convertor (ADC) and on-chip sensors. See 7Series
FPGAs and Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital
Converter User Guide (UG480
)for details on the capabilities of the analog front end.
Figure 1-37 shows the XADC block diagram.
X-Ref Target - Figure 1-37
Figure 1-37: XADC Block Diagram
XC7Z020
AP SoC
U1
VAUX0N
VAUX0P
VAUX8N
VAUX8P
XADC_VREF
(1.25V)
V
REFN
VCCADC
GNDADC
V
N
V
P
DXP
DXN
UG8954_c1_37_041715
100Ω
1 nF
100Ω
100Ω
1 nF
100Ω
To
Header
J63
Dual Use IO
(Analog/Digital)
100Ω
1 nF
100Ω
To
Header
J63
100 nF
XADC_AGND
REF3012
U38
Out In
Gnd
J52
XADC_AGND
To Header J63
10 μF
Ferrite Bead
Ferrite Bead
J13
J12
Star Grid
Connection
J54
XADC_VCC
XADC_AGND
GND
V
REFP
XADC_VREFP
ADP123
U14
Out
In
Gnd
XADC_AGND
10 μF
XADC_VCC Header J40
100 nF
XADC_AGND
To J54
XADC_VCC
J53
Ferrite Bead
VCCAUX
VCC5V0
10 μF
XADC_VCC5V0 To Header J63
1.8V 150 mV max
J14
Close to
Package Pins
Close to
Package Pins
1
2
3
1
2
3
1
2
3
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Xilinx ZC706 Specifications

General

Brand	Xilinx
Model	ZC706
Category	Motherboard
Language	English