Xilinx ZCU102 User Manual

ZCU102 Evaluation Board User Guide www.xilinx.com 69
UG1182 (v1.2) March 20, 2017
Chapter 3: Board Component Descriptions
X-Ref Target - Figure 3-26
Figure 3-26: Quad-SFP Interface
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Table 3-30: XCZU9EG U1 to P2 SFP+ Module Quad-Connector
XCZU9EG
(U1) Pin
Schematic Net Name SFP+ Pin SFP+ Pin Name
Location Right Top SFP0
E4
SFP0_TX_P
RT18
RT_TD_P
E3
SFP0_TX_N
RT19
RT_TD_N
D2
SFP0_RX_P
RT13
RT_RD_P
D1
SFP0_RX_N
RT12
RT_RD_N
A12
SFP0_TX_DISABLE
(1)
RT3
RT_ TX_DISABLE
Location Right Lower SFP1
D6
SFP1_TX_P
RL18
RL_TD_P
D5
SFP1_TX_N
RL19
RL_TD_N
C4
SFP1_RX_P
RL13
RL_RD_P
C3
SFP1_RX_N
RL12
RL_RD_N
A13
SFP1_TX_DISABLE
(1)
RL3
RL_ TX_DISABLE
Location Left Top SFP2
B6
SFP2_TX_P
LT18
LT_TD_P
B5
SFP2_TX_N
LT19
LT_TD_N
B2
SFP2_RX_P
LT13
LT_RD_P
B13
SFP2_RX_N
LT12
LT_RD_N
B13
SFP2_TX_DISABLE
(1)
LT3
LT_ TX_DISABLE
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Xilinx ZCU102 Specifications

General

Processor	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
SD Card	MicroSD card slot
Video Outputs	DisplayPort
FPGA	Xilinx Zynq UltraScale+ XCZU9EG-2FFVB1156E
Memory	4GB DDR4 Component Memory
Storage	MicroSD card slot
Ethernet	Gigabit Ethernet
USB	1 x USB 3.0, 1 x USB 2.0
PCIe	PCIe Gen2 x4
Display	DisplayPort
Power Supply	12V DC input
SATA	SATA 3.0
Clocking	Programmable clocks
Operating System Support	PetaLinux