Xilinx ZCU102 User Manual

ZCU102 Evaluation Board User Guide www.xilinx.com 71
UG1182 (v1.2) March 20, 2017
Chapter 3: Board Component Descriptions
User PMOD GPIO Headers
[Figure 2-1, callout 19]
The ZCU102 evaluation board supports two PMOD GPIO headers J55 (right-angle female)
and J87 (vertical male). The PMOD nets are wired to the XCZU9EG device U1 bank 47.
Figure 3-28 shows the GPIO PMOD headers J55 and J87. Table 3-31 lists the connections
between the XCZU9EG MPSoC and the PMOD connectors.
X-Ref Target - Figure 3-27
Figure 3-27: SFP/SFP+ Clock Recovery
X-Ref Target - Figure 3-28
Figure 3-28: PMOD Connectors
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Xilinx ZCU102 Specifications

General

Processor	Quad-core ARM Cortex-A53, Dual-core ARM Cortex-R5
SD Card	MicroSD card slot
Video Outputs	DisplayPort
FPGA	Xilinx Zynq UltraScale+ XCZU9EG-2FFVB1156E
Memory	4GB DDR4 Component Memory
Storage	MicroSD card slot
Ethernet	Gigabit Ethernet
USB	1 x USB 3.0, 1 x USB 2.0
PCIe	PCIe Gen2 x4
Display	DisplayPort
Power Supply	12V DC input
SATA	SATA 3.0
Clocking	Programmable clocks
Operating System Support	PetaLinux