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Xilinx ZCU102

Xilinx ZCU102
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ZCU102 Evaluation Board User Guide www.xilinx.com 48
UG1182 (v1.2) March 20, 2017
Chapter 3: Board Component Descriptions
GEM3 Ethernet (MIO 64-77)
[Figure 2-1, callout 12]
The PS-side Gigabit Ethernet MAC (GEM) implements a 10/100/1000 Mb/s Ethernet
interface, shown in Figure 3-12, which connects to a TI DP83867IRPAP Ethernet RGMII PHY
before being routed to an RJ45 Ethernet connector. The RGMII Ethernet PHY is boot
strapped to PHY address 5'b01100 (0x0C) and Auto Negotiation set to Enable.
Communication with the device is covered in the DP83867 RGMII PHY data sheet [Ref 18].
X-Ref Target - Figure 3-12
Figure 3-12: Ethernet Block Diagram
7,
'3,5
*(0
0,2
5*0,,
0',2
5-DQG
0DJQHWLFV
;
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