Write
The register can be written by the :STATus:OPERation:ENABle command.
Clear
This register will be cleared under any of the following conditions.
• Data “0” is set by the :STATus:OPERation:ENABle command.
• Power ON
The register cannot be cleared in the following cases.
• Receipt of the *RST command
• Receipt of the *CLS command
• Device clear (DCL, SDC)
6.4 Operation Status Register