6.5 Questionable Status Registers
The questionable status registers report the questionable status of the instrument. All
bits of these registers are unassigned. However, the register read/write operations are
performed normally. The summary information of an event register will be set to the QUS
bit of the status byte register.
Structure
The structure of the questionable status registers is shown below.
Structure of the Questionable Status Registers
OR
&
&
&
&
&
&
&
&
Contents of the Questionable Status Registers
Bit Event Name Description Decimal Value
Bit 0–15 Not used Spare (always 0) 0