YOKOGAWA AQ6370C

6-10
IM AQ6370C-17EN
6.5 Questionable Status Registers
The questionable status registers report the questionable status of the instrument. All
bits of these registers are unassigned. However, the register read/write operations are
performed normally. The summary information of an event register will be set to the QUS
bit of the status byte register.
Structure
The structure of the questionable status registers is shown below.
Structure of the Questionable Status Registers
OR
&
&
&
&
&
&
&
&
OPS Bit of the Status Byte Register
not used
not used
not used
not used
not used
not used
not used
not used
not used
not used
not used
not used
not used
not used
not used
not used
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
&
&
&
&
&
&
&
&
:STAT:QUES:COND?
Questionable Condition Register
:STAT:QUES:EVEN?
Questionable Event Register
:STAT:QUES:ENAB?
Questionable Event Enable Register
Contents of the Questionable Status Registers
Bit Event Name Description Decimal Value
Bit 0–15 Not used Spare (always 0) 0