ARTIX-7 FPGA Development Board AX7101 User Manual
Board to Board Connectors CON4
The 80-Pin connector CON4 is used to extend the normal IO and GTP
high-speed data and clock signals of the FPGA BANK16. The voltage standard
of the IO port of BANK16 can be adjusted by an LDO chip. The default installed
LDO is 3.3V. If the user wants to output other standard levels, it can be
replaced by a suitable LDO. The high-speed data and clock signals of the GTP
are strictly differential routed on the core board. The data lines are equal in
length and kept at a certain interval to prevent signal interference.
Pin Assignment of Board to Board Connectors CON4
To Next Page
