Alinx AXU4EV-E - Page 7

ZYNQ Ultrascale + FPGA Board AXU4EV-E User Manual
7 / 58
Amazon Store: https://www.amazon.com/alinx
Figure 1-1-1: The Schematic Diagram of the AXU4EV-E
Through this diagram, you can see the interfaces and functions that the
AXU4EV-E FPGA Development Board contains:
 ACU4EV core board
It consists of ZU4EV +4GB DDR4（PS）+1GB DDR4（PL）+8GB eMMC
FLASH + 256Mb QSPI FLASH, and there are 2 crystal oscillators to
provide the clock, a single-ended 33.3333MHz crystal oscillator for the
PS system, and a differential 200MHz crystal oscillator for the PL logic
DDR reference clock.
 M.2 Interface
1 PCIEx1 standard M.2 interface, used to connect M.2 SSD solid state
drives, with a communication speed of up to 6Gbps.
 DP Output Interface
1 standard Display Port output display interface, used for video image