Atmel ATtiny25 User Manual

91
7598H–AVR–07/09
ATtiny25/45/85
Figure 14-5. Effects of Unsynchronized OCR Latching
During the time between the write and the latch operation, a read from OCR1A or OCR1B will
read the contents of the temporary location. This means that the most recently written value
always will read out of OCR1A or OCR1B.
When OCR1A or OCR1B contain $00 or the top value, as specified in OCR1C register, the out-
put PB1(OC1A) or PB3(OC1B) is held low or high according to the settings of
COM1A1/COM1A0. This is shown in Table 14-5.
In PWM mode, the Timer Overflow Flag - TOV1 is set when the TCNT1 counts to the OCR1C
value and the TCNT1 is reset to $00. The Timer Overflow Interrupt1 is executed when TOV1 is
set provided that Timer Overflow Interrupt and global interrupts are enabled. This also applies to
the Timer Output Compare flags and interrupts.
The frequency of the PWM will be Timer Clock 1 Frequency divided by (OCR1C value + 1). See
the following equation:
Table 14-5. PWM Outputs OCR1x = $00 or OCR1C, x = A or B
COM1x1 COM1x0 OCR1x Output OC1x Output OC1x
0 1 $00 L H
0 1 OCR1C H L
1 0 $00 L Not connected.
1 0 OCR1C H Not connected.
1 1 $00 H Not connected.
1 1 OCR1C L Not connected.
PWM Output OC1x
PWM Output OC1x
Unsynchronized OC1x Latch
Synchronized OC1x Latch
Counter Value
Compare Value
Counter Value
Compare Value
Compare Value changes
Glitch
Compare Value changes
f
PWM
f
TCK1
OCR1C + 1()
------------------------------------=

Atmel ATtiny25 Specifications

General

Architecture	AVR
Flash Memory	2 KB
SRAM	128 B
EEPROM	128 B
Clock Speed	20 MHz
I/O Pins	6
PWM Channels	2
Operating Voltage	1.8V - 5.5V
ADC	4 channels, 10-bit
Communication Interfaces	SPI, I2C, USART
Operating Temperature Range	-40°C to 85°C
Timers	8-bit Timer/Counter with PWM, 16-bit Timer/Counter with PWM
Package	8-pin PDIP, SOIC-8

Summary

Features

Overview and Pin Configurations

Pinout

Pin configuration details for ATtiny25/45/85, showing pin functions for SOIC and QFN packages.

Overview

Introduces the ATtiny25/45/85 as a low-power AVR microcontroller with RISC architecture.

AVR CPU Core

Architecture & Registers

Covers CPU core, architectural overview, ALU, status, and general purpose registers.

Instruction Execution & Reset/Interrupts

Details instruction timing, reset, and interrupt handling mechanisms.

ATtiny25/45/85 Memories

Flash, SRAM, EEPROM, and I/O Memory

Describes Flash, SRAM, EEPROM, and I/O memory spaces and their characteristics.

System Clock and Clock Options

Clock Sources and Prescalers

Details clock sources (RC, Crystal, PLL) and the system clock prescaler.

Power Management and Sleep Modes

MCU Control Register

Details the MCU Control Register for power management and sleep mode selection.

Sleep Modes (Idle, ADC Noise Reduction, Power-down)

Explains the different sleep modes and their features for power saving.

Power Reduction Register

Describes the PRR for stopping clocks to peripherals to reduce power consumption.

System Control and Reset

Reset Sources

Lists and describes the various reset sources like Power-on, External, Watchdog, and Brown-out.

Brown-out Detection

Details the On-chip Brown-out Detection (BOD) circuit and its configuration.

Interrupts

Interrupt Vectors in ATtiny25/45/85

Lists the interrupt vectors and their definitions for ATtiny25/45/85.

I/O Ports

Ports as General Digital I/O

Covers port configuration, general I/O, and switching between input/output.

Alternate Port Functions

Explains alternate functions of port pins and overriding signals.

Register Description for I/O-Ports

Details the PORTB, DDRB, and PINB registers for I/O port control.

External Interrupts

MCU Control Register – MCUCR

Details the External Interrupt Control Register for interrupt sense control.

General Interrupt Mask Register – GIMSK

Covers the GIMSK for enabling external and pin change interrupts.

8-bit Timer/Counter0 with PWM

Modes of Operation and Registers

Explains operational modes and register descriptions for Timer/Counter0.

Counter and Compare Units

Timer/Counter1 and Dead Time Generator

Details Timer/Counter1 operation and the Dead Time Generator for PWM.

Universal Serial Interface – USI

Functional Descriptions and Registers

Covers USI modes (3-wire, SPI, 2-wire) and register descriptions.

Analog Comparator

ACSR and ADCSRB Registers

Details Analog Comparator Control and Status Registers for configuration and interrupts.

Analog Comparator Multiplexed Input

Explains selecting ADC pins as the negative input to the Analog Comparator.

Analog to Digital Converter

ADC Features and Operation

Lists ADC features and describes its operation, including channel and reference selection.

Starting a Conversion

Explains manual and auto-triggered ADC conversion start methods.

ADC Conversion Result

Details how to read and interpret ADC conversion results in different modes.

debugWIRE On-chip Debug System

Features, Interface, and Registers

Covers debugwire features, physical interface, limitations, and registers.

Memory Programming

Lock Bits and Fuse Bytes

Explains memory lock bits and the functionality of fuse bytes.

Serial Downloading

Details serial programming methods including SPI and HVSP.

High-voltage Serial Programming

Covers programming Flash, EEPROM, Lock bits, and Fuse bits using HVSP.

Electrical Characteristics

Absolute Maximum Ratings*

Lists the stress ratings that may cause permanent damage to the device.

DC Characteristics

Provides DC characteristics across temperature and voltage ranges.

Typical Characteristics

Supply Current (Active, Idle, Power-down)

Shows supply current graphs for different modes versus frequency and VCC.

Pin Characteristics (Pull-up, Driver Strength, Thresholds)

Details pin pull-up, driver strength, and threshold characteristics.

Oscillator and BOD Characteristics

Covers BOD thresholds and internal oscillator frequency characteristics.

Register Summary

Instruction Set Summary

Ordering Information

Package Types

Lists available package types like T5 and PC with their specifications.

Document Revision History

Errata