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20.3.1 Digital Input Disable Register 1 – DIDR1
• Bit 1, 0 – AIN1D, AIN0D: AIN1, AIN0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the AIN1/0 pin is disabled. The corre-
sponding PIN Register bit will always read as zero when this bit is set. When an analog signal is
applied to the AIN1/0 pin and the digital input from this pin is not needed, this bit should be writ-
ten logic one to reduce power consumption in the digital input buffer.
Bit 76543210
– – – – – – AIN1D AIN0D DIDR1
Read/Write R R R R R R R/W R/W
Initial Value00000000
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