Azbil SDC36 - Page 246

9-10
Chapter 9. LIST OF COMMUNICATION DATA
Bank Item name
RAM address EEPROM address RAM EEPROM
Decimal
point
information
Notes
Decimal Hexadecimal Decimal Hexadecimal Read Write Read Write
Event Internal Event 7 ON delay time 7534 1D6E 23918 5D6E S
Internal Event 7 OFF delay time 7535 1D6F 23919 5D6F S
Internal Event 8 main setting 7536 1D70 23920 5D70 S Same as RAM address 13070
(decimal).
Internal Event 8 sub-setting
7537 1D71 23921 5D71 S Same as RAM address 13071
(decimal).
Internal Event 8 Hysteresis
7538 1D72 23922 5D72 S
Internal Event 8 ON delay time 7539 1D73 23923 5D73 S
Internal Event 8 OFF delay time 7540 1D74 23924 5D74 S
Extended
tuning
AT type 8501 2135 24885 6135 —
(Reserved for future extension.) 8502 2136 24886 6136
∆
X
∆
X —
Just-FiTTER settling band 8503 2137 24887 6137 —
SP lag constant 8504 2138 24888 6138 1
(Reserved for future extension.) 8505 2139 24889 6139
∆
X
∆
X —
AT Proportional band adjust 8506 213A 24890 613A 2
AT Integral time adjust 8507 213B 24891 613B 2
AT Derivative time adjust 8508 213C 24892 613C 2
Control algorithm 8509 213D 24893 613D —
Just-FiTTER assistance coefficient 8510 213E 24894 613E —
(Reserved for future extension.) 8511 213F 24895 613F
∆
X
∆
X —
(Reserved for future extension.) 8512 2140 24896 6140
∆
X
∆
X —
(Reserved for future extension.) 8513 2141 24897 6141
∆
X
∆
X —
(Reserved for future extension.) 8514 2142 24898 6142
∆
X
∆
X —
(Reserved for future extension.) 8515 2143 24899 6143
∆ ∆ ∆ ∆
2
(Reserved for future extension.) 8516 2144 24900 6144
∆ ∆ ∆ ∆
2
(Reserved for future extension.) 8517 2145 24901 6145
∆ ∆ ∆ ∆
2
(Reserved for future extension.) 8518 2146 24902 6146
∆ ∆ ∆ ∆
—
Mode AUTO/MANUAL mode selection 9001 2329 25385 6329 * * — Same as RAM address 14596
(decimal). Writing is enabled
under no DI Assignment and
other conditions.
RUN/READY mode selection
9002 232A 25386 632A * * — Same as RAM address 14595
(decimal). Writing is enabled
under no DI Assignment
conditions.
LSP/RSP mode selection
9003 232B 25387 632B * * — Same as RAM address 14598
(decimal). Writing is enabled
under no DI Assignment
conditions.
AT stop/start selection
9004 232C 25388 632C * * — Same as RAM address 14597
(decimal). Writing is enabled
under no DI Assignment and
other conditions.
Release all DO latches
9005 232D 25389 632D * * — Writing is enabled under no DI
Assignment conditions.
Operation
display
PV 9101 238D 25485 638D X X P Same as RAM address 14356
(decimal).
SP (Target value)
9102 238E 25486 638E P (Note 3)
LSP group selection
9103 238F 25487 638F * * — Same as RAM address 14592
(decimal). Writing is enabled
under no DI Assignment
conditions. (Note 4)
PID group being selected.
9104 2390 25488 6390 X X —
(Continue on next page.)