BBK DK1410SI - Page 80

99 GPIO7 YUV3
InOut 4mA,
SR,SMT
52) General purpose IO 7
53) Digital video YUV output 3
Dram Interface (38) (Sorted by position)
145 RA4 InOut DRAM address 4
144 RA5 InOut DRAM address 5
143 RA6 InOut DRAM address 6
142 RA7 InOut DRAM address 7
141 RA8 InOu DRAM address 8
140 RA9 InOut DRAM address 9
139 RA11 InOut Pull-Down DRAM address bit 11
138 CKE Output DRAM clock enable
136 RCLK InOut Dram clock
135 RA3 InOut DRAM address 3
134 RA2 InOut DRAM address 2
133 RA1 InOut DRAM address 1
131 RA0 InOut DRAM address 0
130 RA10 InOut DRAM address 10
129 BA1 InOut DRAM bank address 1
128 BA0 InOut DRAM bank address 0
127 RCS# Output DRAM chip select, active low
126 RAS# Output DRAM row address strobe, active low
125 CAS# Output DRAM column address strobe, active low
124 RWE# Output DRAM Write enable, active low
123 DQM1 InOut Data mask 1
122 RD8 InOut DRAM data 8
121 RD9 InOut DRAM data 9
119 RD10 InOut DRAM data 10
118 RD11 InOut DRAM data 11
117 RD12 InOut DRAM data 12
116 RD13 InOut DRAM data 13
115 RD14 InOut DRAM data 14
114 RD15 InOut DRAM data 15
113 RD0 InOut DRAM data 0
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