Cattron Safe-E-Stop - Page 73

73
Version 17
Safe-E-Stop™
User Guide
Bit 7: TILT indicator
BOOL
19
PSD1 – RSSI
SINT
(-128 to 127)
Received signal strength of last telegram received, in dBm
20-22
PSD2 Status bytes
1-2 & RSSI
(same structure as PSD1)
23-25
PSD3 Status bytes
1-2 & RSSI
(same structure as PSD1)
26-28
PSD4 Status bytes
1-2 & RSSI
(same structure as PSD1)
29-31
PSD5 Status bytes
1-2 & RSSI
(same structure as PSD1)
32
Reserved
Future use. Set to 0
33
MSD transactions counter
USINT (0-255)
Free running counter; increments each time a RF transaction is
initiated by the MSD.
34
PSD1 responses counter
USINT
Free running counters; each counter increment for each valid
response received from the corresponding PSD.
Valid responses are responses with right System Address and
no CRC or framing error
With the current transaction structure, if no response losses,
each PSD response counter increments twice as fast as the
MSD transaction counter
35
PSD2 responses counter
USINT
36
PSD3 responses counter
USINT
37
PSD4 responses counter
USINT
38
PSD5 responses counter
USINT
39-64
Reserved
Future use. Set to 0