Clevo P170HM User Manual

Schematic Diagrams
Processor 7/7 B - 9
B.Schematic Diagrams
Processor 7/7
Sheet 8 of 58
Processor 7/7
R353 *0_04
H_CPU_RSVD7
R362
1K_1%_04
Q26
*AO3402L
G
DS
Q25
* AO340 2L
G
DS
R339
*1K_04
R370
*1K_04
R332
1K_1%_04
R369
1K_1%_04
R382
1K_1%_04
1.5V
DRAMRST_CNTRL 4,20
DRAMRST_CNTRL 4,20
1.5V
H_CPU_RSVD6
CFG2
On CRB
H_SNB_IVB#_PWRCTRL = low, 1.0V
H_SNB_IVB#_PWRCTRL = high/NC, 1.05V
CFG7
PEG DEFER TRAINING
1: (Default) PEG Train immediately following xxRESETB de assertion
0: PEG Wait for BIOS for training
H_SNB_IVB#_PWRCTRL
H_SNB_IVB#_PWRCTRL
CFG4
3.3V 3,4,14,15,19,20,21,23,24,25,26,28,29,30,32,35,36,37,39,40,41,42
H_CPU_RSVD7
R313 0_04
MVREF_DQ_DIMMA 10,11
CFG5
CFG4
R375 * 0_04
CFG7
H_CPU_RSVD6
CFG7
CFG Straps for Processor
R74 *1K_04
R73 *1K_04
R77 *1K_04
R83 *1K_04
Sandy Bridge Processor 7/7 ( RESERVED )
RESERVED
U32E
PZ 98927-3641-01F
CFG[0]
AK2 8
CFG[1]
AK2 9
CFG[2]
AL26
CFG[3]
AL27
CFG[4]
AK2 6
CFG[5]
AL29
CFG[6]
AL30
CFG[7]
AM31
CFG[8]
AM32
CFG[9]
AM30
CFG[10]
AM28
CFG[11]
AM26
CFG[12]
AN28
CFG[13]
AN31
CFG[14]
AN26
CFG[15]
AM27
CFG[16]
AK3 1
CFG[17]
AN29
RSVD34
AM33
RSVD35
AJ27
RSVD38
J16
RSVD42
AT34
RSVD39
H16
RSVD40
G16
RSVD41
AR 35
RSVD43
AT33
RSVD45
AR 34
RSVD56
AT2
RSVD57
AT1
RSVD58
AR 1
RSVD46
B34
RSVD47
A33
RSVD48
A34
RSVD49
B35
RSVD50
C35
RSVD51
AJ32
RSVD52
AK32
RSVD30
AE7
RSVD31
AK2
RSVD28
L7
RSVD29
AG7
RSVD27
J15
RSVD16
C30
RSVD15
D23
RSVD17
A31
RSVD18
B30
RSVD20
D30
RSVD19
B29
RSVD22
A30
RSVD21
B31
RSVD23
C29
RSVD24
J20
RSVD37
T8
RSVD6
B4
RSVD7
D1
RSVD8
F25
RSVD9
F24
RSVD11
D24
RSVD12
G25
RSVD13
G24
RSVD14
E23
RSVD32
W8
RSVD33
AT26
RSVD25
B18
RSVD44
AP35
RSVD10
F23
RSVD5
AJ26
RSVD1
AJ31
RSVD2
AH31
RSVD3
AJ33
RSVD4
AH33
KEY
B1
RSVD53
AH 27
RSVD26
A19
RSVD54
AN 35
RSVD55
AM35
R81 *1K_04
1.5V 4,10,11,12, 13,26,30,3 7,39, 41
MVREF _D Q_DI MMB 12,13
R380 0_04
CFG5
Display Port Presence Strap
1:(Default) Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port device is
connected to the Embedded Display Port
CFG4
R312
100K_04
3.3V
CFG6
R374 *0_04
MVREF _C A_D IMMB 12
CFG6
CFG2
1:(Default) Normal Operation; Lane #
definition matches socket pin map definition
0:Lane Reversed
CFG2
PEG Static Lane Reversal - CFG2 is for the 16x
CFG[6:5]
PCIE Port Bifurcation Straps
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
R352 0_04
R360 *0_04
MVREF_CA_DIMMA 10

Clevo P170HM Specifications

General

Brand	Clevo
Model	P170HM
Category	Laptop
Language	English