Technical description
4-18 HF SSB Transceiver 9323/9360/9390/9780 Technical Service Manual
VCO2 and phase lock loop (04-03135)
1 04-03135 Sheet 1
VCO2 is a crystal controlled Colpitts oscillator. The tuned circuit L40, C130/131,
C132 and C133 sets the appropriate frequency of operation. The network
(consisting of C128, Z4, D31 and L39) is equivalent to a voltage controlled, very
high Q series tuned circuit. This network effectively grounds the gate of V14 at
the series resonant frequency. This determines the final frequency of oscillation.
The oscillator drive output, from capacitor divider C132 and C133 is applied to
mixers IC7 and IC8. It is also applied via emitter follower V19 to the input of
synthesiser IC10 pin 4.
Synthesiser IC10 is almost identical to VCO1 synthesiser IC9 except for the
following:
• The programmed division ratio of both the VCO and the reference frequencies
vary between 1.1 kHz to 2 kHz. A look up table contained on the
Microprocessor and Audio PCB allows for 10 Hz steps over the frequency
range.
• Different filter components are used (C142, R110 and C141) because of the
narrower operating frequency range.
• The control voltage at the output of V23 and V24 are connected via source
follower V25 to varicap D31 of VCO2.
• The reference frequency is obtained from IC9 pin 2 via a buffer amplifier V26
to IC10 pin 1.
455 kHz local oscillator for USB/LSB (04-02972)
In USB mode, the 7304 kHz reference oscillator is taken from the second PLL
IC13 pin 3 [1 04-02972 Sheet 1]. It is then applied via a harmonic filter network
(R268, C244, L205 and C245) [1 04-02972 Sheet 2] to the input of a "divide by
two" divider IC208/A pin 3. The output (pin 6) is applied to a second "divide by
two" divider IC208/B pin 11.
The enable line of dividers IC208/A and IC208/B pins 4 and 10 and the gate input
of IC206/C pin 8 are all connected to the output port of IC209 pin 9. In USB
mode, the microprocessor IC101 [1 04-02976] latches the output of IC209 pin 9
high, via the local I
2
C bus to IC209. This enables the dividers and disables the
1814 kHz oscillator NOR gate IC206/C.
The 1826 kHz reference signal (7304 kHz divided by 4) of IC208/B pin 8 is fed
via NOR gate IC206/B to two more cascade "divide by two” dividers IC207/A and
B. This produces a balanced output signal of 456.5 kHz signal at pin 8.
From here it is applied via the attenuator network (R269, R270, R271 and R272)
to the balanced local oscillator inputs of modulator IC202 and demodulator IC203
pins 8 and 10.
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