142 FX3 Programmers Manual, Doc. # 001-64707 Rev. *C
FX3 P-Port Register Access
Note that simply reading or writing fewer than DMA_SIZE bytes does not terminate the transfer –
the remaining bytes can be read at any time. Only when DMA_SIZE bytes have been transferred or
when DMA_ENABLE is explicitly cleared (by writing to DMA_XFER) does the transfer end.
The following diagrams illustrate both the normal partial and aborted transfer:
Figure 10-3. Partial DMA Transfers
Figure 10-4. Figure 4:Aborted DMA transfers
The following should be noted:
DMA_WMARK de-asserts when either its watermark position is reached or shortly after the transfer
is aborted, whichever occurs earlier.
SOCK_STAT[N] de-asserts (and so will the INTR based on it) shortly after all data for the current buf-
fer is exchanged. However, DMA_READY and DMA_ENABLE remain asserted until the last burst if
fully completed (or the transfer is aborted).
A transfer can be aborted in the middle of a burst, assuming the AP is capable of transferring a par-
tial burst.
10.4.4 Short Transfer – Zero Length Buffers
When a zero byte buffer is available for read (egress), no data words are transferred and
DMA_READY will never assert. AP observes this by reading DMA_SIZE=0.
When a zero length buffer needs to written (ingress), the AP will write DMA_SIZE=0. The transfer
terminates automatically with no data exchanged.
EVENT
SOC K _
STAT
DMA_READY
SOCK_STAT[N]
A/D
R/W#
DMA_
XFER
DMA_ENABLE
Buffer N
Burst 1
Buf fe r N
Burst 0
DMA_WMARK
SIZE
N
2
0
DMA_
XFER
DMA_
XFER
SIZEEVENT
SOCK _
STAT
DMA_READY
SOCK_STAT[N]
A/D
R/W#
DMA_
XFER
DMA_ENABLE
Buffer N
Burst 1
Buffer N
Burst 0
DMA_WMARK
N
2
DMA_
XFER
DMA_
XFER
DMA_
XFER
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