FX3 Programmers Manual, Doc. # 001-64707 Rev. *C 105
FX3 Serial Peripheral Register Access
9.1.1.10 I2S_POWER register
The I2S_POWER register is used to turn power to the I2S block ON/OFF.
9.1.2 I
2
C Registers
The FX3 device provides an I
2
C master block that can be configured to talk to various slave devices
at different transfer rates. This section documents all of the registers related to the I
2
C interface.
Bits Field Name
HW
Access
SW
Access
Default
Value
Description
0ACTIVEWR0
Indicates that the block is powered up and ready
for operation. Other I2S registers should be only
accessed after this bit has been set to 1.
31 RESETN R RW 0
Active LOW reset signal for all logic in the block.
After setting this bit to 1, firmware polls and waits
for the ‘active’ bit to assert. Reading ‘1’ from
‘resetn’ does not indicate the block is out of reset –
this may take some time depending on initialization
tasks and clock frequencies.
This bit must be asserted ('0') for at least 10 µs for
effective reset.
Name
Width
(bits)
Address Description
I2C_CONFIG 32 0xE0000400 Configuration and modes register
I2C_STATUS 32 0xE0000404 Status register
I2C_INTR 32 0xE0000408 Interrupt status register
I2C_INTR_MASK 32 0xE000040C Interrupt mask register
I2C_TIMEOUT 32 0xE0000410 Bus timeout register
I2C_DMA_TIMEOUT 32 0xE0000414 DMA transfer timeout register
I2C_PREAMBLE_CTRL 32 0xE0000418
Specify start/stop bit locations during pre-
amble (command and address) phase.
I2C_PREAMBLE_DATA0 32 0xE000041C
Data to be sent during preamble phase –
Word 0
I2C_PREAMBLE_DATA1 32 0xE0000420
Data to be sent during preamble phase –
Word 1
I2C_PREAMBLE_RPT 32 0xE0000424
Settings for repeating the preamble for poll-
ing the device status.
I2C_COMMAND 32 0xE0000428 Command register to initiate I2C transfers
I2C_EGRESS_DATA 32 0xE000042C Write data register
I2C_INGRESS_DATA 32 0xE0000430 Read data register
I2C_BYTE_COUNT 32 0xE0000438 Desired size of data transfer
I2C_BYTES_TRANSFERRED 32 0xE000043C Remaining size for the current data transfer
I2C_SOCKET 32 0xE0000440 Selects DMA sockets for I2C data transfers
I2C_ID 32 0xE00007F0 Block ID register
I2C_POWER 32 0xE00007F4 Power and reset register
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