88 FX3 Programmers Manual, Doc. # 001-64707 Rev. *C
FX3 Application Structure
2. Device cache configuration: The second step is to configure the device caches. The device has
8KB data cache and 8KB instruction cache. In this example only instruction cache is enabled as
the data cache is useful only when there is a large amount of CPU based memory accesses.
When used in simple cases, it can decrease performance due to large number of cache flushes
and cleans and it also adds complexity to the code.
status = CyU3PDeviceCacheControl (CyTrue, CyFalse, CyFalse);
{
goto handle_fatal_error;
}
3. IO matrix configuration: The third step is the configuration of the IOs that are required. This
includes the GPIF and the serial interfaces (SPI, I2C, I2S, GPIO and UART).
io_cfg.useUart = CyTrue;
io_cfg.useI2C = CyFalse;
io_cfg.useI2S = CyFalse;
io_cfg.useSpi = CyFalse;
#if (CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT == 0)
io_cfg.isDQ32Bit = CyFalse;
io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_UART_ONLY;
#else
io_cfg.isDQ32Bit = CyTrue;
io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT;
#endif
/* No GPIOs are enabled. */
io_cfg.gpioSimpleEn[0] = 0;
io_cfg.gpioSimpleEn[1] = 0;
io_cfg.gpioComplexEn[0] = 0;
io_cfg.gpioComplexEn[1] = 0;
status = CyU3PDeviceConfigureIOMatrix (&io_cfg);
if (status != CY_U3P_SUCCESS)
{
goto handle_fatal_error;
}
In this example:
a. The setting of CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT is used to configure the
GPIF in 32/16 bit mode
b. GPIO, I2C, I2S and SPI are not used
c. UART is used
The IO matrix configuration data structure is initialized and the CyU3PDeviceConfigureIOMatrix
function (in the library) is invoked.
4. The final step in the main() function is invocation of the OS. This is done by issuing a call to the
CyU3PKernelEntry() function. This function is defined in the library and is a non returning call.
This function is a wrapper to the actual ThreadX OS entry call. This function:
a. Initializes the OS
b. Sets up the OS timer
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