14.2.5 *CLS
This Clear Status Command clears the device’s status structures.
• All Event Registers summarized in the Status Byte.
• The Standard Event Status Register.
• Sets the device into the Operation Complete Command Idle State.
• Sets the device into the Operation Complete Query Idle State.
Note:
The *CLS command does not effect the Output Queue. However if there is data in the Output Queue and
a *CLS command immediately followed by a Program Message Terminator is received, the Output
Queue will cleared.
Standard Event status Register
This register contains the events that are standardized by IEEE488.2.
Common Commands are provided to access the values associated with the Standard Event Status.
14.2.6 *ESE
The Standard Event Status Enable Command specifies the bit values of the Standard Event Status
Enable Register. This register determines which events from the standard Event Status Register are
summarized in bit 5, the Event Summary Bit - ESB - of the Status Byte Register.
A bit value 1 in the Standard Event Status Enable Register selects the corresponding event bit in the
Standard Event Status Register to be reported in the Event Summary Bit.
The command parameter is specified as a format, a decimal integer value from 0 to 255 and expressed
base 2 (binary), the parameter represents the bit value of the Standard Event Status Enable Register.
*ESE?
The Standard Event Status Enable Query returns a decimal value, which expressed in base 2 reflects
the bit values of the Standard Event Status Enable Register.
14.2.7 *ESR?
The *ESR? query causes the Standard Event Status Register is cleared.
Example:
send —-> *ESR?
read <—- 28 equals the binary value 00011100
The bits 4 (EXE), 3 (DDE) and 2 (QYE) are set. This means that an Execution Error, a Device
Dependent Error and a Query Error has occurred since the last time this register was read.
Note:
The next *ESR? query will return a zero value, if no new events have occurred.
PSC SERIES DELTA ELEKTRONIKA BV
May 2008 MANUAL page 20
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