9 Application Instructions API 150-199
DVP-PLC Application Manual
9-59
API Mnemonic Operands Function
180
MAND P
Matrix ‘AND’ Operation
Controllers
ES/EX/SS SA/SX/SC EH/SV
Bit Devices Word Devices Program Steps Type
OP
X Y M S K H KnX KnY KnM KnS T C D E F
S
1
* * * * * * *
S
2
* * * * * * *
D * * * * * *
n * * *
MAND, MANDP: 9 steps
PULSE 16-bit 32-bit
ES EX SS SA SX SC EH SV ES EX SS SA SX SC EH SV ES EX SS SA SX SC EH SV
Operands:
S
1
: Matrix source device 1 S
2
: Matrix source device 2 D: Operation result n: Array length
Explanations:
1. Range of n: K1 ~ K256
2. S
1
, and S
2
designate KnX, KnY, KnM and KnS; D designates KnYm KnM and KnS
3. SA/SX/SC can designate n = 4. EH/EH2/SV can designate n 4≦ .
4. See the specifications of each model for their range of use.
5. The two matrix sources S
1
and S
2
perform matrix ‘AND’ operation according to the array length n. The result is
stored in D.
6. Operation rule of matix ‘AND’ : The result will be 1 if both two bits are 1; otherwise the result will be 0.
Program Example:
When X0 = On, the 3 arrays of 16-bit registers D0 ~ D2 and the 3 arrays of 16-bit registers D10 ~ D12 will perform a
matrix ‘AND’ operation. The result will be stored in the 3 arrays of 16-bitd registers D20 ~ D22.
X0
MAND D0 D10 D20 K3
1111111111 11
0000
1111111111 11
0000
1111111111 11
0000
b15 b0
MAND
1
1
000
111
00000000
11
000
111
00000000
1
1
000
1
11
00000000
1
1
000000000000
11
000
0
00000000
11
000
0
00000000
00
00
00
Before
execution
After
execution
Remarks:
1. Explanations on the matrix instruction:
a) A matix consists of more than 1 consecutive 16-bit registers. The number of registers in the matrix is the
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