Denon AVR-X5200W - Page 184

A3V64S40GTP-60 Block Diagram
A3V56S30FTP
A3V56S40FTP
256M Single Data Rate Synchronous DRAM
Revision 1.1 Mar., 2010
Page 3 / 39
Note:This figure shows the A3V56S30FTP
The A3V56S40FTP configuration is 8192x512x16 of cell array and DQ0-15
Type Designation Code
A 3Ｖ 56 Ｓ４０F ＴＰ－G6
Speed Grade 75： 133MHz@CL=3
7： 143MHz@CL=3
6： 166MHz@CL=3
G： Green
Package Type TP：TSOP (II)
Process Generation
Function Reserved for Future Use
Organization 2
n
3：x8, 4：x16
SDR Synchronous DRAM
Density 56：256M bits
Interface V：LVTTL
Memory Style (DRAM)
Zentel DRAM
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