DIGITAL-LOGIC AG MSM586SEN/SEV Manual V1.5E
56
I/O Ad-
dress
Read/Write
Status
Description
00D2h W Write request register for DMA channels 4-7
00D4h W Write single mask register bit for DMA channels 4-7
bits 7-3 = 0 Reserved
bit 2 = 0 Clear mask bit, 1 Set mask bit
bits 1-0 = Channel select
00 Channel 4
01 Channel 5
10 Channel 6
11 Channel 7
00D6h W Mode register for DMA channels 4-7
bits 7-6 = 00 Demand mode
01 Single mode
10 Block mode
11 Cascade mode
bit 5 = 0 Address increment select
1 Address decrement select
bit 4 = 0 Disable auto initialization
1 Enable auto initialization
bits 3-2 = Operation type
00 Verify operation
01 Write to memory
10 Read from memory
11 Reserved
bits 1-0 = Channel select
00 Channel 4
01 Channel 5
10 Channel 6
11 Channel 7
00D8h W Clear byte pointer flip/flop for DMA channels 4-7
00DAh R Read Temporary Register for DMA channels 4-7
00DAh W Master Clear for DMA channels 4-7
00DCh W Clear mask register for DMA channels 4-7
00DEh W Write mask register for DMA channels 4-7
00F0h W Math coprocessor clear busy latch
00F1h W Math coprocessor reset
00F2h -
00FFh
R / W Math coprocessor
0140h –
014Fh
R / W SCSI Controller if installed
I/O addresses 0170h - 0177h are reserved for use with a secondary hard drive. See
addresses 01F0h - 01F7h for bit definitions.
0170h R / W Data register for hard drive 1
0171h R Error register for hard drive 1
0171h W Precomposition register for hard drive 1
0172h R / W Sector count - hard drive 1
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