DIGITAL-LOGIC Microspace MSM586SEN - Page 61

DIGITAL-LOGIC AG MSM586SEN/SEV Manual V1.5E
61
I/O Ad-
dress
Read/Write
Status
Description
03F4h R Status register for primary diskette drive controller
bit 7 = 1 Data register is ready
bit 6 = 0 Transfer from system to controller
1 Transfer from controller to system
bit 5 = 1 Non-DMA mode
bit 4 = 1 Diskette drive controller is busy
bits 3-2 = Reserved
bit 1 = 1 Drive 1 is busy
bit 0 = 1 Drive 0 is busy
03F5h R / W Data register for primary diskette drive controller
03F6h R Control port for primary diskette drive controller
bits 7-4 = Reserved
bit 3 = 0 Reduce write current
1 Head select enable
bit 2 = 0 Disable diskette drive reset
1 Enable diskette drive reset
bit 1 = 0 Disable diskette drive initialization
1 Enable diskette drive initialization
bit 0 = Reserved
03F7h R Digital input register for primary diskette drive controller
bit 7 = 1 Diskette drive line change
bit 6 = 1 Write gate
bit 5 = Head select 3 / reduced write current
bit 4 = Head select 2
bit 3 = Head select 1
bit 2 = Head select 0
bit 1 = Drive 1 select
bit 0 = Drive 0 select
03F7h W Select register for primary diskette data transfer rate
bits 7-2 = Reserved
bits 1-0 = 00 500 Kbs mode
01 300 Kbs mode
10 250 Kbs mode
11 Reserved
I/O addresses 03F8h - 03FFh are reserved for use with serial port 1. The bit definitions
for these addresses also apply to serial ports 2, 3, and 4.
03F8h W Transmitter holding register for serial port 1 - Contains the
character to be sent. Bit 0, the least significant bit, is the
first bit sent.
bits 7-0 = Data bits 0-7 when the Divisor Latch Access
Bit (DLAB) is 0
03F8h R Receive buffer register for serial port 1 - Contains the
character to be received. Bit 0, the least significant bit, is
the first bit received.
bits 7-0 = Data bits 0-7 when the Divisor Latch Access
Bit (DLAB) is 0
Continued...