Troubleshooting with software
32
0x85 FPGA Interrupt Status register:
Bit 0: Zilog interrupt INT0 pending
Bit 1: Zilog interrupt INT1 pending
Bit 2: Zilog interrupt INT2 pending
Bit 5: Outbound VME interrupt active
Bit 6: Inbound VME interrupt pending
Bit 8: Bit used for identifying the hardware configuration
(Bits 1 and 6 are the same information)
0x86 FPGA VME BASE register:
With this register you can choose the base address of the module in the
VME bus, and the Interrupt Request Level the module responds to during
an Interrupt Acknowledgement cycle.
Bits 0-2: VME Interrupt Request Level*
Bit 3: Activates the VME bus
Bits 4-7: Choosing the VME base address (A20-A23)
0x87 FPGA EMD and OGF Control register
Bit 0-2: Bits used for configuring OGF interface.
Bit 3-7: Bits used for programming EMD FPGA, if one is required.
0x90 FPGA MVB Control:
Bit 0: Controlling the inbound interrupt 0
Bit 1: Controlling the inbound interrupt 1
Bit 2: Controlling the inbound interrupt 2
Bit 3: Controlling the inbound interrupt 3
Bit 4: Enables the Zilog interrupt INT0
Bit 5: MFCL signal
Bit 6: Activates the DCDC Converter
Bit 7: Resets the MVB Controller (default: on)
When bit 7 is on, Shared Memory is visible at address space 0x80000-
0xBFFFF, otherwise it is Traffic Memory.
0x91 FPGA MVB Status:
Bit 0: MVB Controller outbound interrupt 0 active
Bit 1: MVB Controller outbound interrupt 1 active
Bit 2: MVB Controller timer 1
Bit 3: MVB Controller timer 2
Bit 4: MVB Controller timer strobe
Bit 6: DCDC Converter output voltage OK
Bit 7: MVB Controller transmitter active
0xE0 EEPROM:
Bit 0: Data out (must be 1 when read from EEPROM)
Bit 1: Clock, inverted when read
Bit 2: Clock Enable
Bit 3: Serial Enable
Bit 4: Output Enable (0) / Reset (1)
Bit 5: Chipselect
Bit 7: Data in
Address Contents
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