Epson RX8130CE - Reset Output Function

16. Reset output function
RX8130CE Jump to Top / Bottom
ETM50E-07 Seiko Epson Corporation 50
16. Reset output function
This RTC has a built-in Reset-Controller, which outputs a Reset-signal on the /RST-pin to control external HW like
MCUs in case of a drop in supply voltage. When the VDD voltage drops below V
DET
1 (register selectable V
DET
11 or
V
DET
12), a /RST-signal is output. Once V
DD
raises beyond V
DET
1 voltage again, the /RST-signal is released.
In case INIEN bit is set to "1", I
2
C and FOUT are stopped when V
DD
drops below V
DET
1.
14.8.1. Related register of reset output function
Addressh
Function
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
1D
Flag Register
VBLF
0
UF
TF
AF
RSF
VLF
VBFF
1F
Control Register1
SMP
TSEL1
SMP
TSEL0
CHG
EN
INIEN
0
RS
VSEL
BF
VSEL1
BF
VSEL0
1) RSVSEL-bit
Setting of V
DET
1 voltage level. In case V
DD
drops below this level, the /RST-signal is output and the I/F and FOUT
output are stopped (depending on INIEN-bit setting).
Table 43 RSVSEL
RSVSEL
Data
Description
Write / Read
0
-VDET11 (2.75 V) (default)
1
-VDET12 (2.70 V)
2) RSF-bit
This bit holds the result of detecting the reset voltage.
Table 44 RSF bit
RSF
Data
Description
Write
0
The RSF is cleared to 0 and waiting for next low voltage detection.
1
Invalid (writing a 1 will be ignored)
Read
0
-
1
A voltage drops below -V
DET
1 was detected.