Epson RX8130CE - Figures

22. Figures
RX8130CE Jump to Top / Bottom
ETM50E-07 Seiko Epson Corporation 66
Table 40 VBFF ............................................................................................................................................ 46
Table 41 VBLF ............................................................................................................................................ 46
Table 42 VBLFE .......................................................................................................................................... 46
Table 43 RSVSEL ....................................................................................................................................... 50
Table 44 RSF bit ......................................................................................................................................... 50
Table 45 Digital Adjustment ........................................................................................................................ 51
22. Figures
Figure 1 Block Diagram ................................................................................................................................ 6
Figure 2 Package .......................................................................................................................................... 7
Figure 3 Circuit EX1 ...................................................................................................................................... 8
Figure 4 Circuit EX2 ...................................................................................................................................... 8
Figure 5 Circuit EX3 ...................................................................................................................................... 8
Figure 6 Circuit EX4 ...................................................................................................................................... 8
Figure 7 External Dimension and Soldering pattern ..................................................................................... 9
Figure 8 Marking Layout ............................................................................................................................... 9
Figure 9 I
2
C-Bus Interface Timing Chart .................................................................................................... 13
Figure 10 Reset signal timing chart (Power Initial Supply) ......................................................................... 14
Figure 11 Reset signal timing chart ( Backup resume ) ............................................................................. 14
Figure 12 Power supply initial sequence .................................................................................................... 15
Figure 13 Power-On sequence1 .............................................................................................................. 16
Figure 14 Power-On sequence2 .............................................................................................................. 16
Figure 15 Frequency temperature characteristics ...................................................................................... 17
Figure 16 Basic (32.768 k Hz oscillation, counter, FOUT) Function .......................................................... 24
Figure 17 Wakeup timer initial sequence ................................................................................................... 27
Figure 18 Wakeup timer block diagram ...................................................................................................... 27
Figure 19 Wakeup timer start sequence ..................................................................................................... 29
Figure 20 Wakeup timer inner block diagram ............................................................................................. 30
Figure 21 Wakeup timer timing chart .......................................................................................................... 31
Figure 22 Alarm interrupt inner block diagram ........................................................................................... 34
Figure 23 Alarm Interrupt time chart ........................................................................................................... 34
Figure 24 Time update inner block diagram ............................................................................................... 36
Figure 25 Time update time chart ............................................................................................................... 36
Figure 26 Battery backup switchover block diagram .................................................................................. 38
Figure 27 V
BAT
charge current characteristics V
DD
= 3.0 V, 5.5 V ......................................................... 39
Figure 28 Re-chargeable battery connection ............................................................................................. 39
Figure 29 Non re-chargeable battery SW1, SW2 control (INIEN:1, CHGEN:0) ........................................ 40
Figure 30 Non Re-chargeable battery SW1, SW2 control (INIEN = 1, CHGEN = 0) ................................. 40
Figure 31 Re-chargeable battery SW1, SW2 control (INIEN = 1, CHGEN = 1) ........................................ 41
Figure 32 Battery backup (SW1, SW2 automatic control) .......................................................................... 42