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Epson RX8130CE - Page 28

Epson RX8130CE
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14. Functions
RX8130CE Jump to Top / Bottom
ETM50E-07 Seiko Epson Corporation 27
The example of the error of the first countdown: A value to preset is 0004h
Cycle error
初回周期誤差
TE
Designated cycle
Internal source clock
TF
3
2
1
4
Down counter
4
Figure 17 Wakeup timer initial sequence
Inside counter block diagram
4096Hz
Resister
Timer Counter 0
Timer Counter 1
TSTP
source
clock
selector
64Hz
1Hz
1/60
1/60
1Hz
1/60Hz
1/3600Hz
TSTP
timer stop signal
TSTP,TBKE,TBKON bit
Note: The resolution of the count value depends on the source clock
Figure 18 Wakeup timer block diagram
3) TE bit(Timer Enable)
When TE bit is "0", the default (preset) can be checked by reading this register.
Table 17 Wakeup timer control
TE
Data
Description
Write
0
Stops wakeup timer interrupt function.
Clearing this bit to zero does not enable the /IRQ low output status to be cleared (to Hi-z).
1
Starts wakeup timer interrupt function.
The countdown that starts when the TE bit value changes from "0"to "1" always begins from the
preset value.
4) TF bit(Timer Flag)
This is a flag bit that retains the result when a wakeup timer interrupt event is detected.

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