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HP 300

HP 300
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Frame
Buffer
Controller
The
Frame
Buffer Controller resides on two busses;
the
computer's
CPU
DIO bus,
and
the
frame
buffer
data
bus.
It
performs
the
following functions:
Receives frame buffer
data
for
DRAM
refresh.
Maps 4
bits
per
pixel into 256 colors
out
of
more
than
16
million colors.
Generates graphics video
outputs.
Allows
the
CPU
to
read
and
write
the
color map.
Communication on
the
CPU
bus consists of register reads
and
writes in
byte
format
under
control
of
the
CPU.
On
the
memory bus, communication consists of frame buffer word loads
under
control of
the
Color Display Controller.
Video
Output
Video
output
is compatible
with
several
HP
monitors.
Standard
Red, Green (with sync),
and
Blue
outputs
are
available
through
BNC connectors on
the
color boards. For
the
monochromatic
boards, composite video
with
sync
is
output
through
a single
BNC
connector.
For color boards, a
data
merging circuit in
the
Frame
Buffer Controller combines color
and
blanking
data
frorn
the
display memory into a 24-bit
data
stram.
Three
digital
to
analog
converters change
this
data
stream
into a
current
source for each of
the
three
color
outputs.
These
outputs
connect
through
cables
to
the
video amplifiers in
the
color monitor.
Display
RAM
Control
Frame
buffer
and
the
Frame Buffer Controller register set are fixed in internal address space.
Frame Buffer Controller registers
and
the
processor
board's
Frame
Buffer Controller
both
use
the
same addresses.
When
the
processor
board
used in
the
computer
has video circuits on-board,
and
the
application
requires a video
board
to
be
installed in a system slot for use
with
the
monitor,
the
Frame
Buffer
Controller chip in
the
processor's video circuits
is
disabled by a switch located on
the
processor.
This
switch
must
be
set before
the
video
board
is
installed in a system slot.
Interrupt
Structure
The
interrupt
structure
is
similar
to
DIO
interrupts.
On
receiving
an
interrupt
and
verifying
the
interrupt
is coming from
the
video
board,
the
CPU
must
then
poll
the
video
boards
to
determine
the
interrupting
device.
Functional Description
63
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