IBM 1 Series - Page 72

Voltage Levels and Switching Characteristics
The driver voltage levels given are the minimum and maximum output
levels for the driver circuits, as seen at the logic circuit output pins.
The receiver switching levels given are as seen at the logic circuit pins and
include dc-noise tolerance.
Driver voltage levels
Non-
Levels Schottky Schottky
MPUL 5.50 V 5.5 V
LPUL 2.40 V 2.4 V
MPDL 0.45 V 0.6 V
LPDL 0.0 V 0.0 V
Receiver switching characteristics
Levels Input
MPUL 5.5 V
LPUL 2.0 V
MPDL 0.8 V
LPDL 0.0 V
Key:
MPUL = most-positive up level
LPUL = least=positive up level
MPDL = most-positive down level
LPDL = least-positive down level
Capacitive Loading
Any single data or tag line that represents one drop on the I/O channel
must not be loaded with more than 30 picofarads (pf). Where a TTL load
has been substituted for a general-unit load, the line capacitance may not
exceed 60 pf. Each circuit line through the socket adapter must be
estimated at 10 pf for application purposes.
Processor I/O Channel 2-61