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Intel 1000BASE-T User Manual

Intel 1000BASE-T
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100Base-TX Test Procedure for the 82544 Chip
1000BASE-T/100BASE-TX/10BASE-T Physical Layer Compliance Tests Manual
148 Intel Confidential
I.5 Specification 9.1.8 - Duty Cycle Distortion (DCD)
I.5.1 Test Case
Duty Cycle Distortion (specification 9.1.8)
I.5.2 Test Purpose
To measure the Duty Cycle at the four MLT-3 transitions, using a pattern in non-scrambled mode.
I.5.3 Specification
When measured between 50% voltage points on +Vout and –Vout, all positive pulse widths,
negative pulse widths, and mid-level time periods must be between 15.50 nsec and 16.50 nsec.
Note: The specification wording within the ANSI TP-PMD can be confusing, but the illustration in the
TP-PMD clearly shows that +/- 0.5 nsec variation is allowed.
I.5.4 Test Equipment
Digitizing oscilloscope with at least 1 GHz bandwidth
P6247 Differential Probe (or equivalent differential probe)
Host computer with gigconf.exe software
I.5.5 Test Fixtures
100 ohm termination fixture 9.1.2.A.

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Intel 1000BASE-T Specifications

General IconGeneral
BrandIntel
Model1000BASE-T
CategoryAdapter
LanguageEnglish

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