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Intel 1000BASE-T

Intel 1000BASE-T
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1000BASE-T/100BASE-TX/10BASE-T Physical Layer Compliance Tests Manual
Intel Confidential 81
10Base-T Transmitter Output Timing Jitter with Cable Model
21 10Base-T Transmitter Output Timing
Jitter with Cable Model
ANSI Section 1411.10.12
21.1 Test Purpose
To verify the jitter added by the UUT.
21.2 Specification
The jitter added to the signal on the DO circuit as it propagates through the UUT and twisted pair
model shall be no more than 12.0 ns.
21.3 Test Equipment
Digitizing Oscilloscope (100 MHz or greater bandwidth)
Differential Probes (100 MHz or greater bandwidth)
CAT 5 twisted pair cable (under 2 inches in length)
21.4 Test Fixtures
100 UTP test load (Appendix A.1)
Twisted pair model (Appendix C)
21.5 Test Procedure
1. Insert CAT 5 cable, connected to twisted pair model, into UUT and attach differential probe to
the test load as shown in Figure 21-1.
Differential Probe
w/ 1 GHz BW
Unit Under Test
(UUT)
Digitizing
Oscilloscope
Test Fixture 40-25
100 Ohm Resistive Load
RX
RJ-45
TX
In
TPM
Out

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