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Intel BB5520UR

Intel BB5520UR
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Intel® Server Boards S5520HC, S5500HCV, and S5520HCT TPS Functional Architecture
Revision 1.8
Intel order number E39529-013
17
3. Functional Architecture
The architecture and design of the Intel
®
Server Boards S5520HC, S5500HCV and
S5520HCTis based on the Intel
®
5520/5500 and ICH10R chipset. The chipset is designed for
systems based on the Intel
®
Xeon
®
Processor 5500 Series in an FC-LGA 1366 Socket B
package with Intel
®
QuickPath Interconnect (Intel
®
QPI) speed at 6.40 GT/s, 5.86 GT/s, and
4.80 GT/s.
The chipset contains two main components:
Intel
®
5520 I/O Hub or 5500 I/O Hub, which provides a connection point between
various I/O components and the Intel
®
QuickPath Interconnect (Intel
®
QPI) based
processors
Intel
®
ICH10 RAID (ICH10R) I/O controller hub for the I/O subsystem
This chapter provides a high-level description of the functionality associated with each chipset
component and the architectural blocks that make up the server boards.

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