Product Description
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• Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
• Software compatible with the PCI Power Management Event (PME) mechanism
defined in the PCI Power Management Interface Specification, Rev. 1.1
1.8 IEEE-1394a Connectors (Optional)
The optional IEEE-1394 interface addresses interconnection of both computer
peripherals and consumer electronics with these features:
• IEEE-1394a operation
• Support for up to 63 peer-to-peer devices
• Operation ranging from 100 Mbits/sec to 400 Mbits/sec (depending on cable type)
• Connection over short and long distances
• Support for both asynchronous and isochronous data transfer
As a manufacturing option, the board includes two IEEE-1394a connectors as follows:
• One IEEE-1394a connector located on the back panel.
• One IEEE-1394a front-panel header located on the component side.
For information about Refer to
The location of the back panel IEEE-1394a connector Figure 18, page 57
The location of the front panel IEEE-1394a header Figure 20, page 59
The signal names of the front panel IEEE-1394a header Section 2.7.2.6, page 69
1.9 Legacy I/O Controller
The legacy I/O controller provides the following features:
• One serial port
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatible with serialized IRQ support for PCI Conventional
bus systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.44 MB or 2.88 MB diskette drive
• Intelligent power management, including a programmable wake-up event interface
• PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the legacy I/O controller.
1.9.1 Serial Port
The board has one serial port connector located on the back panel. The serial port
supports data transfers at rates of up to 115.2 kbits/sec with BIOS support.
For information about Refer to
The location of the serial port A connector Figure 19, page 58
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