© 2019 Jackson Labs Technologies, Inc. 9
Micro-JLT GNSS™ User Manual
2.1.3 Notes on Signal Interfacing and J1 Connector
Connector J1 is a straight-up, 12-pin dual row 2mm spacing Hirose connector part number:
DF11-12DP-2DSA(01). A right angle type board-to-board connector may also be optionally stuffed
at the factory for high-volume custom orders. Pin out descriptions are listed in Table 2.1.
The optional LOCK_OK_OUT signal on J1 pin 11 is a 3.3V LVCMOS signal, and thus require a
series resistor of typically 390 to 470 Ohms when used to drive an external signalling LED.
The serial port RX and TX lines cannot be directly connected to a DB9 connector as these are driven
with RS-422/TTL signal levels. Connecting these pins to an RS-232 serial interface may damage the
board. External RS-422/TTL to RS-232 converters may be used (RS-485 converters will typically
not work as they are bi-directional and power-down when no transmission is active). The output of
the RS-422/TTL to RS-232 converter may then be connected to standard RS-232 USB connector
adaptors. Signalling on the RS-422 serial port should be done in differential mode, although the
RS-422 TX positive output (TXD_TTL) on pin 5 of connector J1 is equivalent to a standard 3.3V
TTL serial output, and may be used as such when used without termination.
If the Micro-JLT GNSS™ is ordered with the TTL option, pin 5 of connector J1 (TXD_TTL), pin 7
of connector J1 (RXD_TTL), and a ground (pin 2 or 9 of connector J1) pin should be connected to
the TTL-to-RS-232 / TTL-to-USB converter.
Connect an active GNSS GPS/Glonass antenna that is compatible to 3.3V antenna power with
typically between 10dB to 40dB gain and less than 1.5dB NF, and connect this antenna prior to
turning-on the board. Use a lightning arrestor on the antenna feed for safety and to prevent damage,
injury, or death in case of a lightning strike.
2.1.4 Coaxial Connectors
The GNSS antenna connector and the 10MHz connector on the Micro-JLT GNSS™ board are
generic SMA female types. Optionally the female MCX connector type can be ordered.
J4 Pin 1 ISP# Enables ISP mode.
Wired in paralell to J1
Pin 1
0V to 3.3V, pulled-high by 4.7K
resistor
Pull to Ground during power-on to
set processor into ISP mode.
Leave floating during normal
operation. May be momentarily
shorted during power-on to Pin 2
of J4 using tweezers etc.
J4 Pin 2 Ground Ground Ground Ground
J4 Pin 3 External PPS
reference Input
Optional PPS External
Reference input
-0.5V to 5.0V with a
recommended <10ns rise/fall
time on the signal. Terminated
by 5K pull-down resistor.
Optional external PPS reference
input in CMOS TTL format.
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