Status Registers
Status Register System
36
STATus:OPERation Condition and Event Enable Registers
The STATus:OPERation condition register continuously monitors
the hardware and firmware status of the analyzer, and is read-only.
To query the register, send:STATus:OPERation:CONDition?
command. The response will be the decimal sum of the bits that
are set to 1. For example, if bit number 9 and bit number 3 are set
to 1, the decimal sum of the 2 bits is 512 plus 8. So the decimal
value 520 is returned.
The STATus:OPERation event register latches transition events from
the condition register as specified by the transition filters. Event
registers are destructive read-only data. Reading data from an
event register will clear the content of that register. To query the
event register, send :STATus:OPERation:[:EVENt]?
command.
The STATus:OPERation event enable register lets you choose the
bits that will set the operation status summary bit (bit 7) of the
status byte register to 1. Send:STATus:OPERation:ENABle
<num> command where <num> is the sum of the decimal values
of the bits you want to enable.
For example, to enable bit 9 and bit 3 (so that whenever either bit 9
or 3 is set to 1, the operation status summary bit of the status byte
register will be set to 1), send:STATus:OPERation:ENABle
520 (512 + 8) command. The command
:STATus:OPERation:ENABle? returns the decimal value of
the sum of the bits previously enabled with
:STATus:OPERation:ENABle <num> command.