signal channel is connected to the A end of the RS485 bus.
③. Connect the RS485 bus to a module that transfer RS485 to TTL, and the GND and a signal
channel of the logic analyzer are connected to the GND and signal export end of the system under
test.
Most of the time, all these 3 ways could be used to sample the signal, but according to RS485
specification, the voltage which the AB ends could identify is between 0.2～6V. In complicated
situations, such as master with many slaves or long wire, the difference of the bus end could be too
little, and the logic analyzer could not identify the signal level correctly with method 2. So method
1 and method 3 are recommended if conditions permit.
2、 I2C
The setting dialog of I2C analyzer is shown below:
1
st
item, the channel used for SDA signal (data)
2
nd
item, the channel used for SCL signal (clock)
3
rd
item, the way to display the address byte. For I2C protocol, every communication is started
with addressing operation, and this byte contains 1-bit read/write flag and device address which is
7-bit wide. And there are three options to display: to display as a whole (8-bit, read/write bit
included); to display as a whole but the read/write flag is 0(8-bit, read/write bit set as 0); only
display 7-bit address (7-bit, address bits only).
3、 SPI
The setting dialog of SPI analyzer is shown below:
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