Lexicon
Board ID ................................................................................................................................................ 7-10
Interface revision ................................................................................................................................... 7-10
Preview Word Clock Select ................................................................................................................... 7-10
Clock Bus Interface............................................................................................................................ 7-10
Clock Selection .................................................................................................................................. 7-11
PLL Support ....................................................................................................................................... 7-11
Phase-Locked Loop ........................................................................................................................... 7-11
PLL Detailed Description ................................................................................................................... 7-12
Power Supply..................................................................................................................................... 7-14
Analog Input card .................................................................................................................................. 7-15
Overview. ........................................................................................................................................... 7-15
Input Buffer ........................................................................................................................................ 7-15
Common Mode Performance............................................................................................................. 7-15
A/D Converter .................................................................................................................................... 7-16
Signal Polarity .................................................................................................................................... 7-16
System Interface Logic ...................................................................................................................... 7-16
Control Interface ................................................................................................................................ 7-16
Register Descriptions......................................................................................................................... 7-16
Clock Interface ................................................................................................................................... 7-17
Digital Audio Interface........................................................................................................................ 7-17
Pin Descriptions ................................................................................................................................. 7-18
Power Supply..................................................................................................................................... 7-20
Analog Output card................................................................................................................................ 7-21
Overview............................................................................................................................................ 7-21
Circuit Description.............................................................................................................................. 7-21
D/A Converter .................................................................................................................................... 7-21
Filter................................................................................................................................................... 7-22
Output Driver...................................................................................................................................... 7-22
Mute Relay......................................................................................................................................... 7-22
Signal Polarity .................................................................................................................................... 7-23
System Interface Logic ...................................................................................................................... 7-23
Control Interface ................................................................................................................................ 7-23
Register Descriptions......................................................................................................................... 7-23
Clock Interface ................................................................................................................................... 7-23
Digital Audio Interface........................................................................................................................ 7-24
Power Supply..................................................................................................................................... 7-26
AES card ............................................................................................................................................... 7-28
Introduction ........................................................................................................................................ 7-28
Overview............................................................................................................................................ 7-28
Circuit Description.............................................................................................................................. 7-29
Startup Sequence .............................................................................................................................. 7-29
AES card Memory Map...................................................................................................................... 7-29
FPGA Control Register ...................................................................................................................... 7-30
FPGA Lock Register .......................................................................................................................... 7-30
Locking to the AES Input Word Clock................................................................................................ 7-31
Octal Select Register ......................................................................................................................... 7-31
Local Loopback Mode:....................................................................................................................... 7-32
Reverb card ........................................................................................................................................... 7-32
Introduction ........................................................................................................................................ 7-32
Overview............................................................................................................................................ 7-32
Circuit Description.............................................................................................................................. 7-33
Startup Sequence .............................................................................................................................. 7-36
DSP 56301 Expansion Port Memory Map ......................................................................................... 7-37
Larc2...................................................................................................................................................... 7-39
General Description ........................................................................................................................... 7-39
Central Processor (sheet 1) ............................................................................................................... 7-40
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