LSIS Master-K K1000S - Chapter 16 Built-In High Speed Counter Ofk200 S; Introduction; Performance Specifications; U I L T - in High Speed Counter of K200 S

Chapter 16 Built-in high speed counter of K200S MASTER-K
16-1
16 Built-in high speed counter of K200S
16.1 Introduction
This chapter describes the specification, handling, and programming of built-in high speed
counter of K200S C type CPU module (K3P-07CS). The built-in high speed counter of K3P-
07CS (Hereafter called HSC) has the following features;
1) 3 counter functions as followings
① 1-phase up / down counter : Up / down is selected by user program
② 1-phase up / down counter : Up / down is selected by external B phase input
③ 2-phase up / down counter : Up / down is automatically selected by the phase
difference between phase A and B.
2) Multiplication (1, 2, or 4) with 2-phase counter
① 2-phase pulse input multiplied by one : Counts the pulse at the leading edge of
phase A.
② 2-phase pulse input multiplied by two : Counts the pulse at the leading / falling edge
of phase A.
③ 2-phase pulse input multiplied by four : Counts the pulse at the leading / falling edge
of phase A and B
16.2 Performance specifications
Items Specifications
Types Phase A, Phase B, Preset
Rated level 24VDC (13mA)
Input signal
Signal type Voltage input
Counting range 0 ~ 16,777,215 (Binary 24 bits)
Max. counting speed 50k pps
1-phase Sequence program or B-phase input
Up / Down
selection
2-phase Auto-select by phase difference of phase A and B
Multiplication 1, 2, or 4
Preset input Sequence program or external preset input