LSIS XBC-DR14E - Page 291

Chapter 13 Installation and Wiring
13 5
(3) Fail safe countermeasure in case of PLC error
Error of PLC CPU and memory is detected by self diagnosis but in case error occurs in IO control part, etc.,
CPU can detect the error. At this case, though it is different according to status of error, all contact point is on
or off, so safety may not be guaranteed. Though we do out best to our quality as producer, configure safety
circuit preparing that error occurs in PLC and it lead to breakdown or accident.
System example
Main
unit
Input
16
point
Input
16
point
Input
16
point
Input
16
point
Output
16
point
Output
16
point
Equip output module for fail safe to last slot of system.
[Fail safe circuit example]
Since P80 turn on/off every 0.5s, use TR output.
F0093
P80
P80
0.5s
0.5s
P80
P81
~
P8F
24V
0V
T1
T2
MC
-
+
DC24
V
MC
T1
T2
L
L
External load
CPU unit
Output module
On delay timer
Off delay timer
Output module for fail safe
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