Microsemi IGLOO2 - Design Implementation

In-Application Programming
UG0451 User Guide Revision 7.0 30
programming cycle by requesting the PROGRAM IAP system service call from the system controller.
The system controller fetches the new bitstream from SPI_0 flash and programs the device and
authenticates it on-the-fly. The bitstream must be authenticated before programming to avoid a non-
operational state. The SPI_0 peripheral must be configured before initiating this request.
In SmartFusion2, once the IAP service call is initiated, the Cortex-M3 firmware is no longer involved in
the IAP. During IAP, the fabric is usable during the first step of the IAP service call. However, it is not
usable during the second, which is the programming stage.
7.1 Design Implementation
In IAP, the device must be preprogrammed with an appropriate configuration to fetch data through one of
the MSS/HPMS communication peripherals and to access the data from the external SPI flash that is
connected to the SPI_0 port. During programming, the fabric enters into Flash*Freeze mode. During IAP,
the communication I/O port used to fetch the bitstream must be enabled. This option can be set in the I/O
Attributes menu in the Libero SoC software (see Use of Flash Freeze Mechanism in Device
Programming, page 45). When the IAP system service call is being executed, the system controller
requires exclusive access to the SPI_0 port. During this step, the application must not attempt to access
the SPI_0 port.
Four SPI slave select pins of the SPI_0 interface (SS4, SS5, SS6, and SS7) drive high during
programing (except 005 and 010 devices). The remaining SPI_0 pins are tristated with weak pull up.
These four pins that drive high during programming must not be used as control pins. The I/O level and
drive strength are based on the previous settings programmed into the device.
There is no limitation on the number of bitstreams that can be stored in external SPI flash other than the
density of the SPI flash itself. As part of the IAP command, the starting address of the bitstream must be
given.
The target board must provide power to the VPP, VPPNVM, VDD, and VDDIOx (where x = SPI_0
interface bank number) pins.
For the recommended voltage ranges and pin locations, see the SmartFusion2 and IGLOO2 Datasheet
and the corresponding package pin assignment table.
For information about the I/O states during IAP programming, see State of SmartFusion2 and IGLOO2
Components During Programming, page 42.
The service call has three modes: authenticate, program, and verify.
7.1.1 Authenticate
The FPGA fabric and MSS/HPMS are operational when the bitstream is authenticated.
7.1.2 Verify
When standalone verification is required, call the fabric digest check before calling the VERIFICATION
system service. A snippet from the firmware code is given below:
if(mode == MSS_SYS_PROG_VERIFY)
{
//Check digest before IAP verify
MSS_SYS_check_digest(MSS_SYS_DIGEST_CHECK_FABRIC);
}
The device is automatically placed in the F*F state for the duration of the verify operation and
automatically awakened upon completion. F*F entry and exit messages are transmitted before the
service response.