Programming Overview
UG0451 User Guide Revision 7.0 3
2 Programming Overview
The SmartFusion
®
2 and IGLOO
®
2 devices support multiple programming modes and can address various
platform requirements. Specific programming modes can be implemented based on:
• End user application
• System requirements
• Package selected
• Design phase
For information about limitations on programming capabilities by package, see Programming Interface,
page 7.
SmartFusion2 and IGLOO2 devices support programming via an external master as well as self-
programming. An external master such as a microprocessor or a programmer accesses either the
system controller's dedicated JTAG or SPI port (SC_SPI) to program the device.
Programming modes using these ports are:
• JTAG programming
• SPI-Slave programming
SmartFusion2 and IGLOO2 devices also support self-programming and those programming modes are:
• Auto programming
• Auto update
• Microcontroller Subsystem (MSS) In-System Programming (ISP) (SmartFusion2 only)
• In-Application programming
Additionally, these devices can be programmed by a standalone programmer or automatic test
equipment (ATE) before mounting them on the board. This programming mode is called production
programming. The following tables list the different programming modes and interfaces/ports used for
these modes. In the following chapters these programming methods are discussed in detail.
Table 1 • SmartFusion2 and IGLOO2 Programming Modes (Except M2S/M2GL050 Device)
Description/
Programming
Mode
JTAG/
SPI-Slave
Programming
Auto
Programming Auto Update MSS ISP 2 Step IAP
Production
Programming
Definition An external
programmer or
processor
programs the
device mounted
on the board
System
controller
programs a
blank device
when the flash
golden pin is
asserted at
device power
up
System
controller
programs a pre-
configured
device with a
newer image
stored in SPI
flash when the
device is
powered up
Cortex-M3 in
the MSS
fetches
bitstream from
outside the chip
and calls ISP
system service,
which programs
the FPGA
Cortex-M3 or
user logic
programs the
bitstream into
the SPI flash
connected to
SPI_0 port and
calls IAP
service call,
which programs
the FPGA
A standalone
programmer or
test equipment
programs the
FPGA before it
is surface
mount using an
adapter module
or a test fixture
Port used JTAG or
SC_SPI
MSS/HPMS
SPI_0
MSS/HPMS
SPI_0
Any
communication
peripheral
MSS/HPMS
SPI_0
JTAG
Bitstream
location
PC or on-board
flash device
External SPI
flash device
connected to
SPI_0
External SPI
flash device
connected to
SPI_0
Remote host or
on-board flash
device
External SPI
flash device
connected to
SPI_0
PC