Microsemi IGLOO2 - Application Note Manual

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AC393

Application Note

Board and Layout Design Guidelines for

SmartFusion2 SoC and IGLOO2 FPGAs

Table of Contents

Default Chapter3
- Table of Contents3
1 Revision History9
2 Board Design Guidelines for Smartfusion2 Soc and IGLOO2 Fpgas12
3 Layout Guidelines for Smartfusion2- and IGLOO2-Based Board Design46
4 Creating Schematic Symbols Using Cadence Orcad Capture CIS for Smartfusion2 and IGLOO2 Designs77
- Creating Schematic Symbols Using Pin Assignment Tables (PAT)77
- Creating Schematic Symbols with User Defined Pin Names84
5 Board Design and Layout Checklist90
6 Appendix: Special Layout Guidelines - Crystal Oscillator98
- Figure 86 Layout of the Crystal Oscillator98
- Figure 87 Schematics of Crystal Oscillator98
7 Appendix: Stack-Up99
- Figure 88 Stack-Up Used in Development Board100
8 Appendix: Dielectric Material101
- Figure 89 Fiberglass Weaving101
9 Appendix: Power Integrity Simulation Topology102
- Figure 90 Power Integrity Simulation Topology102

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